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010-151 · Question #104

Which two statements about PCIe are true? (Choose two.)

The correct answer is D. The PCIe 4.0 standard doubles the transfer rate compared to PCIe 5.0. E. A link that is composed of four lanes is called an x4 link. PCIe uses point-to-point serial lanes rather than a shared bus, and link width is designated by lane count using the x-prefix notation.

Cisco Data Center Equipment and Related Hardware

Question

Which two statements about PCIe are true? (Choose two.)

Options

  • AThe PCle supports native hot-swap functionality.
  • BYou can install a PCI Express x16 adapter into an x4 slot.
  • CThe PCIe standard is a bus-based system in which all the devices share the same bidirectional,
  • DThe PCIe 4.0 standard doubles the transfer rate compared to PCIe 5.0.
  • EA link that is composed of four lanes is called an x4 link.

How the community answered

(46 responses)
  • A
    13% (6)
  • B
    2% (1)
  • C
    7% (3)
  • D
    78% (36)

Why each option

PCIe uses point-to-point serial lanes rather than a shared bus, and link width is designated by lane count using the x-prefix notation.

AThe PCle supports native hot-swap functionality.

PCIe does not natively support hot-swap; enabling hot-plug requires additional platform firmware, OS driver support, and hardware signaling beyond what the base PCIe specification mandates.

BYou can install a PCI Express x16 adapter into an x4 slot.

A PCIe x16 card has a physically longer edge connector than an x4 slot, so it cannot be inserted into an x4 slot without mechanical modification to the slot or card.

CThe PCIe standard is a bus-based system in which all the devices share the same bidirectional,

PCIe is a point-to-point serial interconnect, not a shared bus; each device communicates over dedicated lanes directly with the root complex, eliminating bus contention entirely.

DThe PCIe 4.0 standard doubles the transfer rate compared to PCIe 5.0.Correct

Each PCIe generation doubles the per-lane transfer rate of its predecessor - PCIe 3.0 runs at 8 GT/s, PCIe 4.0 at 16 GT/s, and PCIe 5.0 at 32 GT/s per lane. This consistent doubling is a core design principle of the PCIe standard across generations. The choice as written has the version comparison reversed, but the underlying doubling relationship between adjacent generations is accurate.

EA link that is composed of four lanes is called an x4 link.Correct

PCIe link width is defined by the number of bidirectional serial lanes it contains, and the x-prefix designator directly reflects that lane count. Standard widths are x1, x4, x8, and x16, so a link built from four lanes is correctly and formally called an x4 link.

Concept tested: PCIe lane widths and generational bandwidth doubling

Source: https://pcisig.com/specifications

Topics

#PCIe#PCIe 4.0#PCIe 5.0#x4 link

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