Which two statements about PCIe are true? (Choose two.)

PCIe uses dedicated unidirectional serial pairs - one differential pair for transmit and one for receive - forming a point-to-point connection between each endpoint and the root complex. This eliminates shared-bus contention of legacy PCI and allows each device to use its full link bandwidth simultaneously.

A PCIe x8 card has a longer edge connector than an x4 slot and cannot physically be inserted; only cards with an equal or smaller lane count than the slot width can be installed.

PCIe is explicitly a point-to-point interconnect where each device has its own dedicated link to the root complex, which is a fundamental departure from the shared bidirectional bus of legacy PCI.

PCIe 2.0 doubled the per-lane transfer rate to 5 GT/s relative to PCIe 1.0's 2.5 GT/s, so the statement reverses the relationship incorrectly.

PCIe link width is expressed as 'xN' where N is the number of lanes, so a link composed of four lanes is called an x4 link. This naming convention applies throughout the PCIe standard, covering common widths of x1, x4, x8, and x16, with higher lane counts delivering proportionally greater bandwidth.