An administrator is planning to purchase a new server and wants to ensure the RAM in the server will support double-bit error correction. Which of the following RAM technologies will the server…

Parity memory uses only one additional bit per byte to detect single-bit errors and cannot correct errors or reliably detect double-bit errors due to parity cancellation.

Standard ECC memory implements the SECDED (Single Error Correction, Double Error Detection) algorithm by appending additional check bits to each memory word, enabling the memory controller to automatically correct any single-bit flip and detect the presence of a double-bit error. This hardware-level error handling is mandatory for servers running mission-critical workloads where data integrity must be guaranteed.

Static RAM (SRAM) refers to a transistor-based storage cell design used in caches - it does not define any error correction capability relevant to double-bit detection.

Non-ECC memory contains no error detection or correction circuitry at all, making it entirely unsuitable when error correction is required.