How is the control plane separated from the data plane on branch SRX Series devices?

Question

Options

• Aby running separate kernels inside the Junos OS
• Bby dedicating a separate CPU core for the control plane
• Cby using separate CPUs for the control plane and data plane
• Dby offloading control plane traffic to the SPC

• A
  16% (8)
• B
  71% (35)
• C
  4% (2)
• D
  8% (4)

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