Huawei
H31-341_V2.5 · Question #226
The number of bit error blocks on each VC4 channel is detected by B3 at the receiving end. At the same time, the information which is sent back to the sending end through Q HP-REI and HP- FEBBE…
The correct answer is C. G (61-64). See the full explanation below for the reasoning.
Question
The number of bit error blocks on each VC4 channel is detected by B3 at the receiving end. At the same time, the information which is sent back to the sending end through Q HP-REI and HP- FEBBE report at the sending end?
Options
- AK3 (b1-b4)
- BG1 (b5-b8)
- CG (61-64)
- DJ (b1-64)
How the community answered
(41 responses)- A7% (3)
- B5% (2)
- C73% (30)
- D15% (6)
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